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Confidential MAX8698C, Rev08

Page 33/47

DO NOT COPY. DO NOT DISTRIBUTE 12/8/2009

Suggested Inductors

Manufacturer Series Inductance (uH)

ESR

(ohms)

Current Rating (mA) Dimensions

FDK MIPF

1.5

2.2

3.3

0.07

0.08

0.1

1.5

1.3

1.2

2.5x2.0x1.0

Murata LQH32C_53

1.0

2.2

0.06

0.10

1000

790

3.2x2.5x2.0

TOKO D312C

1.5

2.2

2.7

3.3

0.10

0.12

0.15

0.17

1290

1140

980

900

3.6x3.6x1.2

Hitachi Metals KSLI-252012AG

1.0

2.2

3.3

0.08

0.10

0.11

2000

1500

600

2.5x2.0x1.2

Sumida CDRH2D11

1.5

2.2

3.3

0.05

0.08

0.10

900

780

600

3.2x3.2x1.2

Table 4 Inductor selection guide

Output Capacitor Selection

The output capacitor, C

BUCK

, is required to keep the output voltage ripple small and to ensure regulation loop

stability. C

BUCK

must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R

dielectric are highly recommended due to their small size, low ESR, and small temperature coefficients. Due to

the unique feedback network, the output capacitance can be very low. For most applications a 4.7μF capacitor

is sufficient. For optimum load-transient performance and very low output ripple, the output capacitor value in

μF’s should be equal or larger than the inductor value in μH’s.

Input Capacitor Selection

The input capacitor, C

IN3

, reduces the current peaks drawn from the battery or input power source and reduces

switching noise in the IC. The impedance of C

at the switching frequency should be kept very low. Ceramic

capacitors with X5R or X7R dielectrics are highly recommended due to their small size, low ESR, and small

temperature coefficients. Due to the MAX8698C step-down converter’s fast soft-start, the input capacitance can

be very low. For most applications a 4.7μF capacitor is sufficient.

PCB Layout Guide for the Buck Converters

For main current path from the input capacitor, LX_ pin, up to GND, use shorter and thicker trace. To minimize

EMI, make C

- LX- PGND area shortest possible. The FB node is noise sensitive. Please make the trace of the

FB_ as close and short as possible to the IC.

I2C

C BIT TRANSFER

One data bit is transferred for each clock pulse. The data on DATA must remain stable during the high portion

of the clock pulse as changes in data during this time are interpreted as a control signal.

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